1. Field of Invention
The present invention relates to semiconductor devices that retain data through refreshing, methods of the refreshing, memory systems and electronic apparatuses.
2. Description of Related Art
Currently, the use of VSRAMs (Virtually Static RAMS) as semiconductor memories is well known. Memory cells of a VSRAM are similar to those of a DRAM, with the exception that in a VSRAM, column addresses and row addresses do not need multiplexing. Additionally, a user can use a VSRAM without having to consider refreshing (i.e, refreshing transparency).
It is an object of the present invention to provide a semiconductor device that retains data through refreshing, a method of the refreshing, a memory system and an electronic apparatus.
A method for refreshing a semiconductor device in accordance with the present invention pertains to a method for refreshing a semiconductor device having a memory cell array that is divided in a plurality of blocks. The method can include an operation step of placing the semiconductor device in an operation state, a first detection signal generation step of generating a first detection signal that is a detection signal representative of a change of an address signal of the semiconductor device during the operation state, and a first refreshing step of conducting refreshing, based on the first detection signal, for blocks among the plurality of blocks other than a block that is externally accessed.
In accordance with the present invention, while a block to be external accessed is being externally accessed, refreshing is conducted for blocks to be refreshed, such that the semiconductor device can be effectively operated. Also, in accordance with the present invention, refreshing can be performed without relying on clocks.
The first detection signal may include, for example, an ATD (Address Transition Detector) signal.
With respect to the address signal, for example, an address signal externally input in a semiconductor device can be used as an address signal as it is. Also, the externally input address signal may be converted to a block address signal, a column address, or a row address, which may be then used as an address signal.
The number of blocks to be externally accessed may be one or greater. The number of blocks to be externally accessed may be determined when a semiconductor device is designed.
Conducting refreshing for a block can mean, for example, to conduct refreshing for memory cells in a certain row in the block. The row may be one row or plural rows. They can be optionally determined when a semiconductor device is designed.
External access can mean, for example, to read data from or write data in a memory cell.
The method for refreshing a semiconductor device in accordance with the present invention can be made as follows. The first refreshing step can further include a first refreshing request step of generating a refreshing request for each of the plurality of blocks based on the first detection signal and a first mesh execution step of conducting refreshing, based on the first refreshing request, for the block among the plurality of blocks other than the block to be accessed.
The method for refreshing a semiconductor device in accordance with the present invention can be made as follows. The method can include an external access execution step of eternally accessing the block to be eternally accessed, wherein the external access execution step is synchronized with the first refresh execution step based on the first detection signal. As a result when a certain block is to be externally accessed, the access to the block if being refreshed can be prevented The method for refreshing a semiconductor device in accordance with the present invention can be made as follows. The first refresh execution step can be completed during a period between generation of the first detection signal and generation of a next detection signal. As a result, when a certain block is to be externally accessed, the block is not in a refreshing state, and therefore the external access cannot be delayed.
The method for refreshing a semiconductor device in accordance with the present invention can be made as follows. The method can include a standby step of placing the semiconductor device in a standby state, a second detection signal generation step of generating a second detection signal that is a detection signal representative of a change of an address signal of another semiconductor device, and a second refreshing step of conducting refreshing for the plurality of blocks based on the second detection signal.
As a result, refreshing can be conducted for the plurality of blocks based on the second detection signal without using a clock even when the semiconductor device is in the standby state.
It is noted that the second detection signal may include a signal that is generated by flowing an address signal of another semiconductor device in a circuit that generates a first detection signal. Accordingly, when a first detection signal is an ATD signal, a second detection signal is an ATD signal.
The method for refreshing a semiconductor device in accordance with the present invention can be made as follows. The second detection signal can be generated during a part of the standby state of the semiconductor device. As a result, the frequency of generating second detection signals can be reduced, such that lower power consumption of the semiconductor device can be achieved.
A semiconductor device in accordance with the present invention can include a memory cell array that is divided into a plurality of blocks, a detection signal generation circuit that generates a detection signal that is a signal representative of a change of an address signal, and a refreshing control circuit that conduct refreshing, based on the fist detection signal, for a block among the plurality of blocks other than a block that is externally accessed.
In accordance with the present invention, the same things as described above can be said. It is noted that the detection signal is the same as the above-described first detection signal or the second detection signal. Also, the detection signal generation circuit includes, for example, an ATD signal generation circuit.
The semiconductor device in accordance with the present invention can be made as follows. The refreshing control circuit can include a plurality of refresh request signal generation circuits, each being provided for each of the plurality of blocks for generating a refresh request signal for each of the plurality of blocks, and a plurality of block controls, each being provided for each of the plurality of blocks for generating, based on the refresh request signal, a refresh execution signal for a block among the plurality of blocks other than a block to be externally accessed.
The semiconductor device in accordance with the present invention can be made as follows. A block control among the plurality of block controls corresponding to the block to be externally accessed generates an external access execution signal for the block to be externally accessed, and the plurality of block controls synchronize, based on the detection signal, generation of the external access execution signal with generation of the refresh execution signal.
The semiconductor device in accordance with the present invention can be made as follows. The semiconductor device can be equipped with an address buffer that receives an input of the address signal, and an address buffer control circuit that controls the address buffer such that an address signal of another semiconductor device can be input in the semiconductor device during the standby state of the semiconductor device.
The semiconductor device in accordance with the present invention can be made as follows. The semiconductor device can include a refresh timing signal generation circuit that generates a refresh timing signal, wherein each of the plurality of refresh request signal generation circuits generates the refresh request signal based on the refresh timing signal for each of the corresponding plurality of blocks.
The semiconductor device in accordance with the present invention can be made as follows. During the standby state of the semiconductor device, the address buffer control circuit controls the address buffer based on the refresh timing signal that is non-active such that an address signal of the other semiconductor device can be input in the semiconductor device. As a result, the frequency of generating detection signals can be reduced during the standby state of the semiconductor device, such that lower power consumption of the semiconductor device can be achieved.
The semiconductor device in accordance with the present invention can be made as follows. The semiconductor device can include a block selection signal generation circuit that generates a block selection signal that selects the block to be externally selected for each of the plurality of blocks, wherein tie block selection signal generation circuit renders all the block selection signals to be non-active during the standby state of the semiconductor device. As a result, during the standby state of the semiconductor device, refresh execution signals can be generated for all of the blocks, and therefore refreshing can be conducted for all of the blocks.
A memory system in accordance with the present invention can include the semiconductor device described above and the other semiconductor device that commonly use a bus line for the address signal. In accordance with the present invention, even during a standby state of the semiconductor device, an address signal of another semiconductor device can be input in the semiconductor device. Therefore, even during the standby state of the semiconductor device, refreshing of the semiconductor device can be conducted.
Additionally, the above described semiconductor devices can be included in an electronic apparatus in accordance with the present invention.